This invention relates to methods for making transistor structures, and more particularly, to methods for making transistors having impurity regions separated by extremely small lateral distances.
Because of its ease of fabrication, the field effect transistor (FET) is finding widespread use in integrated circuit technology. The most common FET is one using source and drain regions on the surface of a silicon wafer separated by a channel region through which current is controlled by a gate electrode overlying the channel region and insulated from it by a thin layer of silicon dioxide. These devices lend themselves to large scale integrated circuit fabrication techniques because all of the source and drain regions can be made by simultaneous impurity diffusions or implantations, and relatively large packing densities can be achieved. One drawback is that their electronic speed of operation is limited by the difficulty of making a short channel over which a gate electrode can be accurately registered.
A device that is structurally related to the FET is the lateral bipolar transistor in which emitter and collector regions on the surface of a wafer are separated by a short base region. The applicability of these devices are limited by the difficulty in making a sufficiently short base region on the surface of the wafer.